1. Field of the Invention
The present invention relates to a compiling apparatus, a compiling method and a recording medium storing a compiler which converts a source program into a plurality of intermediate texts, assigns a register to data (variables and constants) to be used by a plurality of operands included in each intermediate text, and converts an intermediate text string to which each register is already assigned into an object program.
More particularly, the present invention relates a register optimizing compiler which generates an intermediate text string for use in a computer in which the type of a register to be allocated to data which is used by each of a plurality of input operands in an intermediate text is limited according to the location of each input operand in the intermediate text.
2. Description of the Related Art
A method of reducing the number of inter-register transfer instructions which generate an object program, divide the object program into a plurality of blocks each of which is a part having one entry and one exit, and check the dependent relation of registers to be used in each block is disclosed in Japanese Patent Laid-Open Number Hei. 3-127229 (No. 127229/1991).
FIG. 6 shows an example of prior art applied to an intermediate text shown in FIG. 4 for register allocation in a computer in which even registers (R0, R2, R4, . . . ) are assigned to operand 1 of two input operands and odd registers (R1, R3, R5, . . . ) are assigned to operand 2 of said two input operands fixedly, and then an optional register is assigned to an output operand after registers are assigned to all the input operands.
In the subtraction text (1), a register R0 is assigned to the data A of the operand 1, and a register R1 is assigned to the data B of the operand 2.
In the multiplication text (2), since the data of the operand 1 is B, it is impossible to assign the register R0 which is already assigned to the data A of the operand 1 in the subtraction text (1) to the data B. Therefore, a register R2 is assigned to the data B of said operand 1. Similarly, a register R3 is assigned to the data A of the operand 2 of said multiplication text (2). A register R4 is assigned to data T1 of the output operand of the subtraction text (1), and a register R5 is assigned to data T2 of the output operand of the multiplication text (2).
As described above, since the registers are assigned to the subtraction text (1) and the multiplication text (2), it becomes necessary to insert a register transfer instruction (2-1) for the data A, and a register transfer instruction (2-2) for the data B between the subtraction text (1) and the multiplication text (2).
Similarly, FIG. 9 shows an example of prior art applied to an intermediate text shown in FIG. 7 for register allocation in a computer in which even registers (R0, R2, R4, . . . ) are assigned to operand 1 of two input operands and odd registers (R1, R3, R5, . . . ) are assigned to operand 2 of said two input operands fixedly, and then an optional register is assigned to an output operand after registers are assigned to all the input operands.
In the subtraction text (1), register R0 is assigned to the data A of the operand 1, and register R1 is assigned to the data B of the operand 2.
In the comparison text (3), since the data of the operand 1 is B, it is impossible to assign register R0 which is already assigned to the data A of the operand 1 in the subtraction text (1) to data B. Therefore, a register R2 is assigned to the data B of said operand 1. Similarly, a register R3 is assigned to the data T1 of the operand 2 of said comparison text (3). A register R3 is assigned to data T1 of the output operand of the subtraction text (1), and a register R4 is assigned to data T3 of the output operand of the comparison text (3).
As described above, since the registers are assigned to the subtraction text (1) and the comparison text (3), it becomes necessary to insert a register transfer instruction (3-1) for the data B between the subtraction text (1) and the comparison text (3).
As described above, it is impossible for the prior art to avoid the use of the register transfer instruction(s) in a computer in which the type of a register to be assigned to data to be used by each of a plurality of input operands is limited according to the location of each operand in an intermediate text.